data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_base.c:776: writting ==> writing
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_base.h:74: dout ==> doubt
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_base.h:111: smaples ==> samples
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_base_pcie.c:616: transmition ==> transmission
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_base_pcie.c:617: implimentation ==> implementation
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_base_pcie.h:45: transfered ==> transferred
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_flash.c:83: PROGRAMM ==> PROGRAM, PROGRAMME
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:29: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:57: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:82: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:85: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:123: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:134: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:139: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.c:152: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.h:43: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.h:49: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_log.h:63: sybsystem ==> subsystem
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_port.h:26: accross ==> across
data/libxtrxll-0.0.1+git20191021.3229d65/xtrxll_port.h:26: differrent ==> different
data/libxtrxll-0.0.1+git20191021.3229d65/CMakeLists.txt:67: undfined ==> undefined
data/libxtrxll-0.0.1+git20191021.3229d65/mod_pcie/xtrxll_pcie_linux.c:431: mmaped ==> mapped
data/libxtrxll-0.0.1+git20191021.3229d65/mod_pcie/xtrxll_pcie_linux.c:594: mmaped ==> mapped
data/libxtrxll-0.0.1+git20191021.3229d65/mod_pcie/xtrxll_pcie_linux.c:700: mmaped ==> mapped
data/libxtrxll-0.0.1+git20191021.3229d65/mod_pcie/xtrxll_pcie_linux.c:788: ouside ==> outside
data/libxtrxll-0.0.1+git20191021.3229d65/mod_usb3380/xtrxll_libusb3380.c:593: intialize ==> initialize
data/libxtrxll-0.0.1+git20191021.3229d65/mod_usb3380/xtrxll_libusb3380.c:987: DISGARDED ==> DISCARDED, DISCARTED
data/libxtrxll-0.0.1+git20191021.3229d65/mod_usb3380/xtrxll_libusb3380.c:1005: availablity ==> availability
data/libxtrxll-0.0.1+git20191021.3229d65/mod_usb3380/xtrxll_libusb3380.c:1006: commad ==> command
data/libxtrxll-0.0.1+git20191021.3229d65/mod_usb3380/xtrxll_libusb3380.c:1128: arraival ==> arrival
data/libxtrxll-0.0.1+git20191021.3229d65/tests/test_xtrxflash.c:33: untill ==> until
data/libxtrxll-0.0.1+git20191021.3229d65/.pc/0001-fix-linkage.patch/CMakeLists.txt:67: undfined ==> undefined