data/simulide-0.1.7+dfsg/README.md:13: analisis ==> analysis
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_usb162.c:48: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_usb162.c:66: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_usb162.c:229: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_usb162.c:251: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128.c:51: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128.c:72: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128.c:112: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128.c:438: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfa1.c:53: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfa1.c:74: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfa1.c:128: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfa1.c:507: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax8.c:33: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega169.c:38: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega169.c:57: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega169.c:103: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega169.c:340: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax8.h:51: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax8.h:70: Termporary ==> Temporary
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax8.h:91: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax8.h:145: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega2560.c:55: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega2560.c:78: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega2560.c:132: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega2560.c:664: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313a.c:45: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313a.c:60: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313a.c:214: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313a.c:237: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega324.c:31: borken ==> broken
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega324.c:32: embarassed ==> embarrassed
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megaxm1.h:49: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megaxm1.h:77: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megaxm1.c:33: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx5.h:46: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx5.h:72: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx5.h:100: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx5.c:33: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax.h:50: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax.h:91: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax.h:126: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx4.h:46: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx4.h:72: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx4.h:112: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax.c:34: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tinyx4.c:33: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313.c:45: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313.c:60: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313.c:197: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny2313.c:220: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax4.h:50: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax4.h:91: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax4.h:155: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_megax4.c:32: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny13.c:45: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny13.c:74: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny13.c:139: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny13.c:207: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny4313.c:45: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny4313.c:60: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny4313.c:214: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_tiny4313.c:237: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega64.c:44: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega64.c:64: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega64.c:105: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega64.c:431: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega32u4.c:71: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega32u4.c:93: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega32u4.c:135: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega32u4.c:474: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfr2.c:79: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfr2.c:100: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfr2.c:154: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega128rfr2.c:516: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1281.c:51: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1281.c:72: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1281.c:120: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1281.c:478: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1280.c:54: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1280.c:76: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1280.c:130: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/sim_mega1280.c:663: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom8.h:552: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfa1.h:656: Adresses ==> Addresses
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfa1.h:950: aci ==> acpi
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfa1.h:966: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfa1.h:5283: tranceiver ==> transceiver
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iotn2313.h:112: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iotn4313.h:123: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/sfr_defs.h:22: orignal ==> original
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom1284p.h:360: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iomxx0_1.h:347: Adresses ==> Addresses
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iomxx0_1.h:410: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iotnx5.h:93: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom169p.h:310: Adresses ==> Addresses
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom169p.h:371: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iotnx4.h:115: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128.h:952: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iotn13.h:92: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iomx8.h:212: Adresses ==> Addresses
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iomx8.h:275: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iousbxx2.h:198: Adresses ==> Addresses
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iousbxx2.h:266: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom32.h:636: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom16.h:108: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom1284.h:314: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom324pa.h:353: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom32u4.h:365: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfr2.h:663: Adresses ==> Addresses
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfr2.h:957: aci ==> acpi
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfr2.h:973: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfr2.h:4648: Tranceiver ==> Transceiver
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom128rfr2.h:6245: tranceiver ==> transceiver
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iotn2313a.h:123: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom328p.h:317: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/cores/avr/iom64.h:970: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_core.c:1346: RCALL ==> RECALL
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_core.c:1348: rcall ==> recall
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_core.c:1358: SER ==> SET
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_watchdog.c:49: unconsistent ==> inconsistent
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_gdb.c:304: Rmoving ==> Removing
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_cycle_timers.h:54: migth ==> might
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_cycle_timers.h:55: repeteadly ==> repeatedly
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_cycle_timers.h:66: qeueue ==> queue
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_vcd_file.h:4: outout ==> output
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_vcd_file.c:4: outout ==> output
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.h:52: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:65: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:120: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:130: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:133: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:191: continiously ==> continuously
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:193: bahaviour ==> behaviour
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:341: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_extint.c:356: extint ==> extinct, extant
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_utils.h:4: outout ==> output
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_utils.c:4: outout ==> output
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_interrupts.c:210: uppon ==> upon
data/simulide-0.1.7+dfsg/src/simavr/sim/sim_regbit.h:94: cheking ==> checking
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_timer.h:163: occured ==> occurred
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_timer.c:223: occured ==> occurred
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_timer.c:250: occured ==> occurred
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_timer.c:258: occured ==> occurred
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_uart.c:118: untill ==> until
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_uart.c:350: writen ==> written
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_acomp.h:74: ACI ==> ACPI
data/simulide-0.1.7+dfsg/src/simavr/sim/avr_acomp.c:185: hadnler ==> handler
data/simulide-0.1.7+dfsg/src/simavr/sim/avr/avr_mcu_section.h:189: wether ==> weather, whether
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/node.cpp:60: conectors ==> connectors
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/node.cpp:69: conectors ==> connectors
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/node.cpp:72: conectors ==> connectors
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/node.cpp:74: conectors ==> connectors
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/connectorline.cpp:137: havent ==> haven't
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/package.h:52: containig ==> containing
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/circuit.cpp:432: shouldnt ==> shouldn't
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/circuit.cpp:856: conect ==> connect
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/circuit.cpp:861: conect ==> connect
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/subcircuit.cpp:519: assing ==> assign
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/connector.cpp:360: assing ==> assign
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/stepper.cpp:110: algoritm ==> algorithm
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/servo.h:59: evry ==> every
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/ledbase.cpp:133: Minimun ==> Minimum
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/mcu/avrcomponentpin.cpp:97: internall ==> internal, internally
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/mcu/avrcomponent.h:50: asign ==> assign
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/mcu/arduino.h:55: asign ==> assign
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/mcu/avrcomponentpin.h:60: asign ==> assign
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/mcu/avrcomponentpin.h:69: asign ==> assign
data/simulide-0.1.7+dfsg/src/gui/circuitwidget/components/mcu/avrcomponentpin.h:78: asign ==> assign
data/simulide-0.1.7+dfsg/src/gui/editorwidget/gcbdebugger.cpp:213: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/basedebugger.h:59: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/avrasmdebugger.h:47: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/avrasmdebugger.h:48: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:113: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:117: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:118: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:125: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:126: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:137: ser ==> set
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:137: rcall ==> recall
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:137: seh ==> she
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:149: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:158: sintax ==> syntax
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:260: proccessor ==> processor
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:384: Debbuger ==> Debugger
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:430: Debbuger ==> Debugger
data/simulide-0.1.7+dfsg/src/gui/editorwidget/codeeditor.cpp:446: Debbuger ==> Debugger
data/simulide-0.1.7+dfsg/src/gui/editorwidget/inodebugger.cpp:129: sorce ==> source, force
data/simulide-0.1.7+dfsg/src/gui/editorwidget/inodebugger.cpp:129: emited ==> emitted
data/simulide-0.1.7+dfsg/src/gui/editorwidget/editorwindow.cpp:465: debuger ==> debugger
data/simulide-0.1.7+dfsg/src/gui/editorwidget/editorwindow.cpp:473: debuger ==> debugger
data/simulide-0.1.7+dfsg/src/gui/editorwidget/picasmdebugger.cpp:132: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/avrasmdebugger.cpp:134: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/avrasmdebugger.cpp:168: supress ==> suppress
data/simulide-0.1.7+dfsg/src/gui/editorwidget/picasmdebugger.h:47: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/picasmdebugger.h:48: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/gcbdebugger.h:51: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/gcbdebugger.h:52: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/highlighter.cpp:45: trough ==> through
data/simulide-0.1.7+dfsg/src/gui/editorwidget/inodebugger.h:49: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/editorwidget/inodebugger.h:50: adress ==> address
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/Property.h:38: enhence ==> enhance
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:261: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:263: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:265: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:282: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:285: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:287: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyModel.cpp:289: childs ==> children, child's
data/simulide-0.1.7+dfsg/src/gui/QPropertyEditor/QPropertyEditorWidget.h:105: usefull ==> useful
data/simulide-0.1.7+dfsg/src/simulator/simulator.cpp:134: untill ==> until
data/simulide-0.1.7+dfsg/src/simulator/elements/e-source.h:44: hight ==> height, high
data/simulide-0.1.7+dfsg/src/simulator/elements/e-source.cpp:91: Hight ==> Height, high
data/simulide-0.1.7+dfsg/src/simulator/elements/e-op_amp.cpp:71: dOut ==> doubt
data/simulide-0.1.7+dfsg/src/simulator/elements/e-op_amp.cpp:72: dOut ==> doubt
data/simulide-0.1.7+dfsg/src/simulator/elements/e-op_amp.cpp:74: dOut ==> doubt
data/simulide-0.1.7+dfsg/src/simulator/elements/e-op_amp.cpp:79: problably ==> probably
data/simulide-0.1.7+dfsg/src/simulator/elements/e-op_amp.cpp:92: dOut ==> doubt
data/simulide-0.1.7+dfsg/src/simulator/elements/e-op_amp.cpp:92: dOut ==> doubt
data/simulide-0.1.7+dfsg/src/simulator/elements/e-element.h:28: complience ==> compliance
data/simulide-0.1.7+dfsg/src/simulator/elements/e-i2c.cpp:136: caracter ==> character
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:108: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:109: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:114: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:115: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:116: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:117: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:121: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:122: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:123: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:124: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:128: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:129: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:130: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:131: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:136: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:146: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:149: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:224: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:225: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:226: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:227: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/baseprocessor.cpp:228: ba ==> by, be
data/simulide-0.1.7+dfsg/src/simulator/elements/processors/avrprocessor.h:59: asign ==> assign
data/simulide-0.1.7+dfsg/resources/data/pic/pic16c72.data:43: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic16c74.data:52: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic16f73.data:50: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic18f4455.data:114: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic12f510.data:31: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic10f220.data:30: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic16f1788.data:67: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic18f4520.data:79: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic16f1823.data:61: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic16c73.data:50: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic18f2550.data:100: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic18f4550.data:114: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic16f74.data:52: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic18f26k22.data:189: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/pic/pic12f1822.data:59: ADRES ==> ADDRESS
data/simulide-0.1.7+dfsg/resources/data/ic74/74HC165.package:34: SER ==> SET
data/simulide-0.1.7+dfsg/resources/data/ic74/74HC165.package:34: SER ==> SET
data/simulide-0.1.7+dfsg/resources/data/codeeditor/sintax/avrasm.sintax:45: ser ==> set
data/simulide-0.1.7+dfsg/resources/data/codeeditor/sintax/avrasm.sintax:45: rcall ==> recall
data/simulide-0.1.7+dfsg/resources/data/codeeditor/sintax/avrasm.sintax:45: seh ==> she
data/simulide-0.1.7+dfsg/debian/patches/spelling.patch:12: recieved ==> received
data/simulide-0.1.7+dfsg/debian/patches/spelling.patch:32: caracter ==> character
data/simulide-0.1.7+dfsg/debian/patches/spelling.patch:50: recieved ==> received
data/simulide-0.1.7+dfsg/debian/patches/spelling.patch:61: Unkown ==> Unknown
data/simulide-0.1.7+dfsg/debian/patches/spelling.patch:70: Unkown ==> Unknown
data/simulide-0.1.7+dfsg/.pc/spelling.patch/src/simulator/elements/e-i2c.cpp:72: recieved ==> received
data/simulide-0.1.7+dfsg/.pc/spelling.patch/src/simulator/elements/e-i2c.cpp:136: caracter ==> character
data/simulide-0.1.7+dfsg/.pc/spelling.patch/src/simulator/elements/e-i2c.h:55: recieved ==> received
data/simulide-0.1.7+dfsg/.pc/spelling.patch/src/simulator/elements/processors/picprocessor.cpp:84: Unkown ==> Unknown
data/simulide-0.1.7+dfsg/.pc/spelling.patch/src/simulator/elements/processors/picprocessor.cpp:95: Unkown ==> Unknown