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          _________________  __ __  __| _/|__|/  |_ 
         / ___\_` __ \__  \ |  |  \/ __ | | \\_  __\
        / /_/  >  | \// __ \|  |  / /_/ | |  ||  |  
        \___  /|__|  (____  /____/\____ | |__||__|  
       /_____/            \/           \/           
              grep rough audit - static analysis tool
                  v2.8 written by @Wireghoul
=================================[justanotherhacker.com]===
higan-106/higan/fc/cartridge/chip/mmc5.cpp-197-
higan-106/higan/fc/cartridge/chip/mmc5.cpp:198:  auto chrSpriteAddr(uint addr) -> uint {
higan-106/higan/fc/cartridge/chip/mmc5.cpp-199-    if(chrMode == 0) {
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higan-106/higan/fc/cartridge/chip/mmc5.cpp-219-
higan-106/higan/fc/cartridge/chip/mmc5.cpp:220:  auto chrBGAddr(uint addr) -> uint {
higan-106/higan/fc/cartridge/chip/mmc5.cpp-221-    addr &= 0x0fff;
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higan-106/higan/fc/cartridge/chip/mmc5.cpp-243-
higan-106/higan/fc/cartridge/chip/mmc5.cpp:244:  auto chrVSAddr(uint addr) -> uint {
higan-106/higan/fc/cartridge/chip/mmc5.cpp-245-    return (vsBank * 0x1000) + (addr & 0x0ff8) + (vsVpos & 7);
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higan-106/higan/fc/cartridge/chip/mmc5.cpp-293-      if(addr & 0x2000) return readCIRAM(addr);
higan-106/higan/fc/cartridge/chip/mmc5.cpp:294:      return board.chrrom.read(chrActive ? chrBGAddr(addr) : chrSpriteAddr(addr));
higan-106/higan/fc/cartridge/chip/mmc5.cpp-295-    }
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higan-106/higan/fc/cartridge/chip/mmc5.cpp-316-    } else {
higan-106/higan/fc/cartridge/chip/mmc5.cpp:317:      if(vsFetch) result = board.chrrom.read(chrVSAddr(addr));
higan-106/higan/fc/cartridge/chip/mmc5.cpp:318:      else if(sprite8x16 ? bgFetch : chrActive) result = board.chrrom.read(chrBGAddr(addr));
higan-106/higan/fc/cartridge/chip/mmc5.cpp:319:      else result = board.chrrom.read(chrSpriteAddr(addr));
higan-106/higan/fc/cartridge/chip/mmc5.cpp-320-      if(bgFetch && exramMode == 1) result = board.chrrom.read(exbank * 0x1000 + (addr & 0x0fff));
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higan-106/higan/fc/cpu/cpu.hpp-34-  auto rdyLine(bool) -> void;
higan-106/higan/fc/cpu/cpu.hpp:35:  auto rdyAddr(bool valid, uint16 value = 0) -> void;
higan-106/higan/fc/cpu/cpu.hpp-36-
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higan-106/higan/fc/cpu/timing.cpp-60-
higan-106/higan/fc/cpu/timing.cpp:61:auto CPU::rdyAddr(bool valid, uint16 value) -> void {
higan-106/higan/fc/cpu/timing.cpp-62-  io.rdyAddrValid = valid;
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higan-106/higan/fc/apu/dmc.cpp-11-  cpu.rdyLine(1);
higan-106/higan/fc/apu/dmc.cpp:12:  cpu.rdyAddr(false);
higan-106/higan/fc/apu/dmc.cpp-13-}
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higan-106/higan/fc/apu/dmc.cpp-21-    if(dmaDelayCounter == 1) {
higan-106/higan/fc/apu/dmc.cpp:22:      cpu.rdyAddr(true, 0x8000 | readAddr);
higan-106/higan/fc/apu/dmc.cpp-23-    } else if(dmaDelayCounter == 0) {
higan-106/higan/fc/apu/dmc.cpp-24-      cpu.rdyLine(1);
higan-106/higan/fc/apu/dmc.cpp:25:      cpu.rdyAddr(false);
higan-106/higan/fc/apu/dmc.cpp-26-
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higan-106/higan/sfc/coprocessor/necdsp/necdsp.cpp-22-  } else {
higan-106/higan/sfc/coprocessor/necdsp/necdsp.cpp:23:    return uPD96050::readDR();
higan-106/higan/sfc/coprocessor/necdsp/necdsp.cpp-24-  }
##############################################
higan-106/higan/processor/upd96050/upd96050.hpp-20-
higan-106/higan/processor/upd96050/upd96050.hpp:21:  auto readDR() -> uint8;
higan-106/higan/processor/upd96050/upd96050.hpp-22-  auto writeDR(uint8 data) -> void;
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higan-106/higan/processor/upd96050/memory.cpp-7-
higan-106/higan/processor/upd96050/memory.cpp:8:auto uPD96050::readDR() -> uint8 {
higan-106/higan/processor/upd96050/memory.cpp-9-  if(regs.sr.drc == 0) {
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higan-106/nall/path.hpp-35-  Dl_info info;
higan-106/nall/path.hpp:36:  dladdr((void*)&program, &info);
higan-106/nall/path.hpp-37-  return Path::real(info.dli_fname);
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higan-106/.pc/use-XDG_CONFIG_HOME.patch/nall/path.hpp-35-  Dl_info info;
higan-106/.pc/use-XDG_CONFIG_HOME.patch/nall/path.hpp:36:  dladdr((void*)&program, &info);
higan-106/.pc/use-XDG_CONFIG_HOME.patch/nall/path.hpp-37-  return Path::real(info.dli_fname);