===========================================================
.___ __ __
_________________ __ __ __| _/|__|/ |_
/ ___\_` __ \__ \ | | \/ __ | | \\_ __\
/ /_/ > | \// __ \| | / /_/ | | || |
\___ /|__| (____ /____/\____ | |__||__|
/_____/ \/ \/
grep rough audit - static analysis tool
v2.8 written by @Wireghoul
=================================[justanotherhacker.com]===
openocd-0.10.0+g20200819/guess-rev.sh-36- if git config --get svn-remote.svn.url >/dev/null; then
openocd-0.10.0+g20200819/guess-rev.sh:37: printf -- '-svn%s' "`git svn find-rev $head`"
openocd-0.10.0+g20200819/guess-rev.sh-38- fi
##############################################
openocd-0.10.0+g20200819/guess-rev.sh-54-if hgid=`hg id 2>/dev/null`; then
openocd-0.10.0+g20200819/guess-rev.sh:55: tag=`printf '%s' "$hgid" | cut -d' ' -f2`
openocd-0.10.0+g20200819/guess-rev.sh-56-
##############################################
openocd-0.10.0+g20200819/guess-rev.sh-58- if [ -z "$tag" -o "$tag" = tip ]; then
openocd-0.10.0+g20200819/guess-rev.sh:59: id=`printf '%s' "$hgid" | sed 's/[+ ].*//'`
openocd-0.10.0+g20200819/guess-rev.sh-60- printf '%s%s' -hg "$id"
##############################################
openocd-0.10.0+g20200819/guess-rev.sh-74-if rev=`svn info 2>/dev/null | grep '^Last Changed Rev'`; then
openocd-0.10.0+g20200819/guess-rev.sh:75: rev=`echo $rev | awk '{print $NF}'`
openocd-0.10.0+g20200819/guess-rev.sh-76- printf -- '-svn%s' "$rev"
##############################################
openocd-0.10.0+g20200819/src/rtos/linux.c-665-#else
openocd-0.10.0+g20200819/src/rtos/linux.c:666:static int current_base_addr(struct linux_os *linux_os, uint32_t base_addr)
openocd-0.10.0+g20200819/src/rtos/linux.c-667-#endif
##############################################
openocd-0.10.0+g20200819/src/rtos/linux.c-732-#else
openocd-0.10.0+g20200819/src/rtos/linux.c:733: if (!current_base_addr(linux_os, t->base_addr)) {
openocd-0.10.0+g20200819/src/rtos/linux.c-734-#endif
##############################################
openocd-0.10.0+g20200819/src/flash/nor/atsamv.c-91-#define SAMV_NUM_GPNVM_BITS 9
openocd-0.10.0+g20200819/src/flash/nor/atsamv.c:92:#define SAMV_CONTROLLER_ADDR (0x400e0c00)
openocd-0.10.0+g20200819/src/flash/nor/atsamv.c-93-#define SAMV_SECTOR_SIZE 16384
##############################################
openocd-0.10.0+g20200819/src/flash/nor/psoc5lp.c-96-#define PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16)
openocd-0.10.0+g20200819/src/flash/nor/psoc5lp.c:97:#define PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR (1 << 24)
openocd-0.10.0+g20200819/src/flash/nor/psoc5lp.c-98-
##############################################
openocd-0.10.0+g20200819/src/flash/nor/core.h-268- */
openocd-0.10.0+g20200819/src/flash/nor/core.h:269:int get_flash_bank_by_addr(struct target *target, target_addr_t addr, bool check,
openocd-0.10.0+g20200819/src/flash/nor/core.h-270- struct flash_bank **result_bank);
##############################################
openocd-0.10.0+g20200819/src/flash/nor/tcl.c-272-
openocd-0.10.0+g20200819/src/flash/nor/tcl.c:273: retval = get_flash_bank_by_addr(target, address, true, &p);
openocd-0.10.0+g20200819/src/flash/nor/tcl.c-274- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/tcl.c-492- struct flash_bank *bank;
openocd-0.10.0+g20200819/src/flash/nor/tcl.c:493: retval = get_flash_bank_by_addr(target, address, true, &bank);
openocd-0.10.0+g20200819/src/flash/nor/tcl.c-494- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/tcl.c-663- struct flash_bank *bank;
openocd-0.10.0+g20200819/src/flash/nor/tcl.c:664: retval = get_flash_bank_by_addr(target, address, true, &bank);
openocd-0.10.0+g20200819/src/flash/nor/tcl.c-665- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/kinetis_ke.c-943-
openocd-0.10.0+g20200819/src/flash/nor/kinetis_ke.c:944: result = get_flash_bank_by_addr(target, 0x00000000, true, &bank);
openocd-0.10.0+g20200819/src/flash/nor/kinetis_ke.c-945- if (result != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c-1132-
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c:1133: res = get_flash_bank_by_addr(target, NRF5_FLASH_BASE, true, &bank);
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c-1134- if (res != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c-1173-
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c:1174: res = get_flash_bank_by_addr(target, NRF5_UICR_BASE, true, &bank);
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c-1175- if (res != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c-1186-
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c:1187: res = get_flash_bank_by_addr(target, NRF5_FLASH_BASE, true, &bank);
openocd-0.10.0+g20200819/src/flash/nor/nrf5.c-1188- if (res != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/w600.c-41-#define QFLASH_CMD_WRITE 0
openocd-0.10.0+g20200819/src/flash/nor/w600.c:42:#define QFLASH_CMD_ADDR (1ul << 31)
openocd-0.10.0+g20200819/src/flash/nor/w600.c-43-#define QFLASH_CMD_DATA (1ul << 15)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/w600.c-52-#define QFLASH_START (1ul << 28)
openocd-0.10.0+g20200819/src/flash/nor/w600.c:53:#define QFLASH_ADDR(addr) (((addr) & 0xFFFFF) << 8)
openocd-0.10.0+g20200819/src/flash/nor/w600.c-54-#define QFLASH_CRM(crm) (((crm) & 0xFF) << 0)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/w600.c-222- retval = w600_start(bank, QFLASH_CMD_SE,
openocd-0.10.0+g20200819/src/flash/nor/w600.c:223: QFLASH_ADDR(bank->sectors[i].offset), 0);
openocd-0.10.0+g20200819/src/flash/nor/w600.c-224- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/w600.c-258-
openocd-0.10.0+g20200819/src/flash/nor/w600.c:259: retval = w600_start(bank, QFLASH_CMD_PP, QFLASH_ADDR(offset),
openocd-0.10.0+g20200819/src/flash/nor/w600.c-260- W600_FLASH_PAGESIZE);
##############################################
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c-94-
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c:95:static inline int mrvlqspi_set_addr(struct flash_bank *bank, uint32_t addr)
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c-96-{
##############################################
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c-480- /* Set read offset address */
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c:481: retval = mrvlqspi_set_addr(bank, offset);
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c-482- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c-797- /* Set read address */
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c:798: retval = mrvlqspi_set_addr(bank, offset);
openocd-0.10.0+g20200819/src/flash/nor/mrvlqspi.c-799- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/xmc4xxx.c-409-
openocd-0.10.0+g20200819/src/flash/nor/xmc4xxx.c:410:static int xmc4xxx_get_sector_start_addr(struct flash_bank *bank,
openocd-0.10.0+g20200819/src/flash/nor/xmc4xxx.c-411- unsigned int sector, uint32_t *ret_addr)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/xmc4xxx.c-560- for (unsigned int i = first; i <= last; i++) {
openocd-0.10.0+g20200819/src/flash/nor/xmc4xxx.c:561: res = xmc4xxx_get_sector_start_addr(bank, i, &tmp_addr);
openocd-0.10.0+g20200819/src/flash/nor/xmc4xxx.c-562- if (res != ERROR_OK) {
##############################################
openocd-0.10.0+g20200819/src/flash/nor/sim3x.c-56-
openocd-0.10.0+g20200819/src/flash/nor/sim3x.c:57:#define FLASHCTRL0_WRADDR (0x4002E0A0)
openocd-0.10.0+g20200819/src/flash/nor/sim3x.c-58-#define FLASHCTRL0_WRDATA (0x4002E0B0)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/core.c-273- * result_bank is set to NULL. */
openocd-0.10.0+g20200819/src/flash/nor/core.c:274:int get_flash_bank_by_addr(struct target *target,
openocd-0.10.0+g20200819/src/flash/nor/core.c-275- target_addr_t addr,
##############################################
openocd-0.10.0+g20200819/src/flash/nor/core.c-431-
openocd-0.10.0+g20200819/src/flash/nor/core.c:432: int retval = get_flash_bank_by_addr(target, addr, true, &c);
openocd-0.10.0+g20200819/src/flash/nor/core.c-433- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/core.c-558- do {
openocd-0.10.0+g20200819/src/flash/nor/core.c:559: retval = get_flash_bank_by_addr(target, addr, true, &c);
openocd-0.10.0+g20200819/src/flash/nor/core.c-560- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nor/core.c-753- /* find the corresponding flash bank */
openocd-0.10.0+g20200819/src/flash/nor/core.c:754: retval = get_flash_bank_by_addr(target, run_address, false, &c);
openocd-0.10.0+g20200819/src/flash/nor/core.c-755- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/flash/nand/mxc.h-33-#define MXC_NF_BUFSIZ (mxc_nf_info->mxc_regs_addr + 0x00)
openocd-0.10.0+g20200819/src/flash/nand/mxc.h:34:#define MXC_NF_BUFADDR (mxc_nf_info->mxc_regs_addr + 0x04)
openocd-0.10.0+g20200819/src/flash/nand/mxc.h:35:#define MXC_NF_FADDR (mxc_nf_info->mxc_regs_addr + 0x06)
openocd-0.10.0+g20200819/src/flash/nand/mxc.h-36-#define MXC_NF_FCMD (mxc_nf_info->mxc_regs_addr + 0x08)
##############################################
openocd-0.10.0+g20200819/src/flash/nand/mxc.h-82-#define MXC_NF_SPARE_BUFFER_MAX 64
openocd-0.10.0+g20200819/src/flash/nand/mxc.h:83:#define MXC_NF_V1_LAST_BUFFADDR ((MXC_NF_V1_SPARE_BUFFER3) + \
openocd-0.10.0+g20200819/src/flash/nand/mxc.h-84- MXC_NF_SPARE_BUFFER_LEN - 2)
openocd-0.10.0+g20200819/src/flash/nand/mxc.h:85:#define MXC_NF_V2_LAST_BUFFADDR ((MXC_NF_V2_SPARE_BUFFER7) + \
openocd-0.10.0+g20200819/src/flash/nand/mxc.h-86- MXC_NF_SPARE_BUFFER_LEN - 2)
##############################################
openocd-0.10.0+g20200819/src/flash/nand/mx3.h-30-#define MX3_NF_BUFSIZ (MX3_NF_BASE_ADDR + 0xe00)
openocd-0.10.0+g20200819/src/flash/nand/mx3.h:31:#define MX3_NF_BUFADDR (MX3_NF_BASE_ADDR + 0xe04)
openocd-0.10.0+g20200819/src/flash/nand/mx3.h:32:#define MX3_NF_FADDR (MX3_NF_BASE_ADDR + 0xe06)
openocd-0.10.0+g20200819/src/flash/nand/mx3.h-33-#define MX3_NF_FCMD (MX3_NF_BASE_ADDR + 0xe08)
##############################################
openocd-0.10.0+g20200819/src/flash/nand/mx3.h-57-#define MX3_NF_SPARE_BUFFER_LEN 16
openocd-0.10.0+g20200819/src/flash/nand/mx3.h:58:#define MX3_NF_LAST_BUFFER_ADDR ((MX3_NF_SPARE_BUFFER3) + MX3_NF_SPARE_BUFFER_LEN - 2)
openocd-0.10.0+g20200819/src/flash/nand/mx3.h-59-
##############################################
openocd-0.10.0+g20200819/src/Makefile.am-28-else
openocd-0.10.0+g20200819/src/Makefile.am:29:%C%_libopenocd_la_CPPFLAGS += -DRELSTR=\"`$(top_srcdir)/guess-rev.sh $(top_srcdir)`\"
openocd-0.10.0+g20200819/src/Makefile.am:30:%C%_libopenocd_la_CPPFLAGS += -DGITVERSION=\"`cd $(top_srcdir) && git describe`\"
openocd-0.10.0+g20200819/src/Makefile.am-31-%C%_libopenocd_la_CPPFLAGS += -DPKGBLDDATE=\"`date +%F-%R`\"
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/bcm2835gpio.c-108- for (unsigned int i = 0; i < jtag_delay; i++)
openocd-0.10.0+g20200819/src/jtag/drivers/bcm2835gpio.c:109: asm volatile ("");
openocd-0.10.0+g20200819/src/jtag/drivers/bcm2835gpio.c-110-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/bcm2835gpio.c-122- for (unsigned int i = 0; i < jtag_delay; i++)
openocd-0.10.0+g20200819/src/jtag/drivers/bcm2835gpio.c:123: asm volatile ("");
openocd-0.10.0+g20200819/src/jtag/drivers/bcm2835gpio.c-124-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/Makefile.rlink-52-%_init.fsm: rlink_init.m4
openocd-0.10.0+g20200819/src/jtag/drivers/Makefile.rlink:53: ${M4} -P -DSHIFTER_PRESCALER=`echo "$@" | sed -e's/_.*//'` $< > $@
openocd-0.10.0+g20200819/src/jtag/drivers/Makefile.rlink-54-
openocd-0.10.0+g20200819/src/jtag/drivers/Makefile.rlink-55-%_call.fsm: rlink_call.m4
openocd-0.10.0+g20200819/src/jtag/drivers/Makefile.rlink:56: ${M4} -P -DSHIFTER_PRESCALER=`echo "$@" | sed -e's/_.*//'` $< > $@
openocd-0.10.0+g20200819/src/jtag/drivers/Makefile.rlink-57-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_st7.h-26-#define ST7_PADR (0x0000)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_st7.h:27:#define ST7_PADDR (ST7_PADR + 1)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_st7.h-28-#define ST7_PAOR (ST7_PADR + 2)
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c-49-
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c:50:#define USB_EP1OUT_ADDR (0x01)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c-51-#define USB_EP1OUT_SIZE (16)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c:52:#define USB_EP1IN_ADDR (USB_EP1OUT_ADDR | 0x80)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c-53-#define USB_EP1IN_SIZE (USB_EP1OUT_SIZE)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c-54-
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c:55:#define USB_EP2OUT_ADDR (0x02)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c-56-#define USB_EP2OUT_SIZE (64)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c:57:#define USB_EP2IN_ADDR (USB_EP2OUT_ADDR | 0x80)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink.c-58-#define USB_EP2IN_SIZE (USB_EP2OUT_SIZE)
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/nulink_usb.c-589- offset = addr - aligned_addr;
openocd-0.10.0+g20200819/src/jtag/drivers/nulink_usb.c:590: LOG_DEBUG("nulink_usb_write_mem8: address not aligned. addr(0x%08" PRIx32
openocd-0.10.0+g20200819/src/jtag/drivers/nulink_usb.c:591: ")/aligned_addr(0x%08" PRIx32 ")/offset(%" PRIu32 ")",
openocd-0.10.0+g20200819/src/jtag/drivers/nulink_usb.c-592- addr, aligned_addr, offset);
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-24-m4_dnl Some macros to make nybble handling a little easier
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:25:m4_define(`m4_high_nybble', `m4_eval(`(($1) >> 4) & 0xf')')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:26:m4_define(`m4_low_nybble', `m4_eval(`($1) & 0xf')')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-27-
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-28-m4_dnl A macro to generate a number of NOPs depending on the argument
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:29:m4_define(`m4_0_to_5_nops', `m4_ifelse(m4_eval(`($1) >= 1'), 1, ` NOP
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:30:'m4_ifelse(m4_eval(`($1) >= 2'), 1, ` NOP
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:31:'m4_ifelse(m4_eval(`($1) >= 3'), 1, ` NOP
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:32:'m4_ifelse(m4_eval(`($1) >= 4'), 1, ` NOP
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:33:'m4_ifelse(m4_eval(`($1) >= 5'), 1, ` NOP
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-34-')))))')
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-43-m4_define(`m4_delay',
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:44:`; delay (m4_eval($1) cycles)'
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:45:`m4_ifelse(m4_eval(`('$1`) < 6'), 1,
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-46- m4_0_to_5_nops($1)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-47-,
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:48: m4_ifelse(m4_eval(`(('$1`) - 3) % 2'), 1, ` NOP')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:49: A.H = m4_high_nybble(`(('$1`) - 3) / 2')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:50: A.L = m4_low_nybble(`(('$1`) - 3) / 2')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-51- Y = A
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-61-m4_define(`m4_delay_setup',
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:62:`; delay setup (m4_eval($1) cycles)'
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:63:`m4_ifelse(m4_eval(`('$1`) < 6'), 0, ` '
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:64: A.H = m4_high_nybble(`('$1`) / 2')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:65: A.L = m4_low_nybble(`('$1`) / 2')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-66- Y = A
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-69-m4_define(`m4_delay_loop',
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:70:`; delay loop (m4_eval($1) cycles)'
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:71:`m4_ifelse(m4_eval(`('$1`) < 6'), 1,
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-72- m4_0_to_5_nops($1)
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-73-,
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:74: m4_ifelse(m4_eval(`('$1`) % 2'), 1, ` NOP')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-75- DECY
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-80-
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:81:m4_define(`m4_delay_loop_round_up', `m4_ifelse(m4_eval($1` < 6'), 1, $1, m4_eval(`(('$1`) + 1) / 2 * 2'))')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4:82:m4_define(`m4_delay_round_up', `m4_ifelse(m4_eval($1` < 6'), 1, $1, m4_eval(`(('$1`) / 2 * 2) + 1'))')
openocd-0.10.0+g20200819/src/jtag/drivers/rlink_call.m4-83-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/imx_gpio.c-143- for (unsigned int i = 0; i < jtag_delay; i++)
openocd-0.10.0+g20200819/src/jtag/drivers/imx_gpio.c:144: asm volatile ("");
openocd-0.10.0+g20200819/src/jtag/drivers/imx_gpio.c-145-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/imx_gpio.c-154- for (unsigned int i = 0; i < jtag_delay; i++)
openocd-0.10.0+g20200819/src/jtag/drivers/imx_gpio.c:155: asm volatile ("");
openocd-0.10.0+g20200819/src/jtag/drivers/imx_gpio.c-156-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h-117-RESULT usbtoc2_fini(uint8_t interface_index);
openocd-0.10.0+g20200819/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h:118:RESULT usbtoc2_writeaddr(uint8_t interface_index, uint8_t addr);
openocd-0.10.0+g20200819/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h:119:RESULT usbtoc2_readaddr(uint8_t interface_index, uint8_t *data);
openocd-0.10.0+g20200819/src/jtag/drivers/versaloon/usbtoxxx/usbtoxxx.h-120-RESULT usbtoc2_writedata(uint8_t interface_index, uint8_t *buf, uint8_t len);
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/jtag_vpi.c-557-
openocd-0.10.0+g20200819/src/jtag/drivers/jtag_vpi.c:558: serv_addr.sin_addr.s_addr = inet_addr(server_address);
openocd-0.10.0+g20200819/src/jtag/drivers/jtag_vpi.c-559-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/include/delay.h-23-
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/include/delay.h:24:#define NOP { __asm nop __endasm; }
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/include/delay.h-25-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/include/jtag.h-23-
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/include/jtag.h:24:#define NOP { __asm nop __endasm; }
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/include/jtag.h-25-
##############################################
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/Makefile-83-clean:
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/Makefile:84: rm -f *.asm *.lst *.rel *.rst *.sym *.ihx *.lk *.map *.mem
openocd-0.10.0+g20200819/src/jtag/drivers/OpenULINK/Makefile-85-
##############################################
openocd-0.10.0+g20200819/src/jtag/zy1000/zy1000.c-870-#include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
openocd-0.10.0+g20200819/src/jtag/zy1000/zy1000.c:871:#include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
openocd-0.10.0+g20200819/src/jtag/zy1000/zy1000.c-872-
##############################################
openocd-0.10.0+g20200819/src/jtag/zy1000/zy1000.c-892- echoServAddr.sin_family = AF_INET; /* Internet address family */
openocd-0.10.0+g20200819/src/jtag/zy1000/zy1000.c:893: echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
openocd-0.10.0+g20200819/src/jtag/zy1000/zy1000.c-894- echoServAddr.sin_port = htons(7777); /* Server port */
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-102-/* Shift in control and address for a new processor access, save them in ejtag_info */
openocd-0.10.0+g20200819/src/target/mips32_pracc.c:103:static int mips32_pracc_read_ctrl_addr(struct mips_ejtag *ejtag_info)
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-104-{
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-146- for (int i = 0; i != 2; i++) {
openocd-0.10.0+g20200819/src/target/mips32_pracc.c:147: int retval = mips32_pracc_read_ctrl_addr(ejtag_info);
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-148- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-188-
openocd-0.10.0+g20200819/src/target/mips32_pracc.c:189: retval = mips32_pracc_read_ctrl_addr(ejtag_info); /* update current pa info: control and address */
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-190- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-989- /* wait PrAcc pending bit for FASTDATA write, read address */
openocd-0.10.0+g20200819/src/target/mips32_pracc.c:990: int retval = mips32_pracc_read_ctrl_addr(ejtag_info);
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-991- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-1026-
openocd-0.10.0+g20200819/src/target/mips32_pracc.c:1027: retval = mips32_pracc_read_ctrl_addr(ejtag_info);
openocd-0.10.0+g20200819/src/target/mips32_pracc.c-1028- if (retval != ERROR_OK)
##############################################
openocd-0.10.0+g20200819/src/target/arm920t.c-58- * Table 9-9 lists the thirteen registers which support physical access.
openocd-0.10.0+g20200819/src/target/arm920t.c:59: * ARM920T_CP15_PHYS_ADDR() constructs the 6-bit reg_addr parameter passed
openocd-0.10.0+g20200819/src/target/arm920t.c-60- * to arm920t_read_cp15_physical() and arm920t_write_cp15_physical().
##############################################
openocd-0.10.0+g20200819/src/target/arm920t.c-65- */
openocd-0.10.0+g20200819/src/target/arm920t.c:66:#define ARM920T_CP15_PHYS_ADDR(x, y, z) ((x << 5) | (y << 1) << (z))
openocd-0.10.0+g20200819/src/target/arm920t.c-67-
openocd-0.10.0+g20200819/src/target/arm920t.c-68-/* Registers supporting physical Read access (from table 9-9) */
openocd-0.10.0+g20200819/src/target/arm920t.c:69:#define CP15PHYS_CACHETYPE ARM920T_CP15_PHYS_ADDR(0, 0x0, 1)
openocd-0.10.0+g20200819/src/target/arm920t.c:70:#define CP15PHYS_ICACHE_IDX ARM920T_CP15_PHYS_ADDR(1, 0xd, 1)
openocd-0.10.0+g20200819/src/target/arm920t.c:71:#define CP15PHYS_DCACHE_IDX ARM920T_CP15_PHYS_ADDR(1, 0xe, 1)
openocd-0.10.0+g20200819/src/target/arm920t.c-72-/* NOTE: several more registers support only physical read access */
##############################################
openocd-0.10.0+g20200819/src/target/arm920t.c-74-/* Registers supporting physical Read/Write access (from table 9-9) */
openocd-0.10.0+g20200819/src/target/arm920t.c:75:#define CP15PHYS_CTRL ARM920T_CP15_PHYS_ADDR(0, 0x1, 0)
openocd-0.10.0+g20200819/src/target/arm920t.c:76:#define CP15PHYS_PID ARM920T_CP15_PHYS_ADDR(0, 0xd, 0)
openocd-0.10.0+g20200819/src/target/arm920t.c:77:#define CP15PHYS_TESTSTATE ARM920T_CP15_PHYS_ADDR(0, 0xf, 0)
openocd-0.10.0+g20200819/src/target/arm920t.c:78:#define CP15PHYS_ICACHE ARM920T_CP15_PHYS_ADDR(1, 0x1, 1)
openocd-0.10.0+g20200819/src/target/arm920t.c:79:#define CP15PHYS_DCACHE ARM920T_CP15_PHYS_ADDR(1, 0x2, 1)
openocd-0.10.0+g20200819/src/target/arm920t.c-80-
##############################################
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-994-#define DMI_HARTINFO_DATAADDR_LENGTH 12
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h:995:#define DMI_HARTINFO_DATAADDR (0xfffU << DMI_HARTINFO_DATAADDR_OFFSET)
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-996-#define DMI_HAWINDOWSEL 0x14
##############################################
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-1089-#define DMI_DEVTREEADDR0_ADDR_LENGTH 32
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h:1090:#define DMI_DEVTREEADDR0_ADDR (0xffffffffU << DMI_DEVTREEADDR0_ADDR_OFFSET)
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-1091-#define DMI_DEVTREEADDR1 0x1a
##############################################
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-1096-#define DMI_NEXTDM_ADDR_LENGTH 32
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h:1097:#define DMI_NEXTDM_ADDR (0xffffffffU << DMI_NEXTDM_ADDR_OFFSET)
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-1098-#define DMI_DATA0 0x04
##############################################
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-1178-#define DMI_SBCS_SBREADONADDR_LENGTH 1
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h:1179:#define DMI_SBCS_SBREADONADDR (0x1U << DMI_SBCS_SBREADONADDR_OFFSET)
openocd-0.10.0+g20200819/src/target/riscv/debug_defines.h-1180-/*
##############################################
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-195-#define read_csr(reg) ({ unsigned long __tmp; \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h:196: asm volatile ("csrr %0, " #reg : "=r"(__tmp)); \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-197- __tmp; })
##############################################
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-199-#define write_csr(reg, val) ({ \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h:200: asm volatile ("csrw " #reg ", %0" :: "rK"(val)); })
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-201-
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-202-#define swap_csr(reg, val) ({ unsigned long __tmp; \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h:203: asm volatile ("csrrw %0, " #reg ", %1" : "=r"(__tmp) : "rK"(val)); \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-204- __tmp; })
##############################################
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-206-#define set_csr(reg, bit) ({ unsigned long __tmp; \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h:207: asm volatile ("csrrs %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-208- __tmp; })
##############################################
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-210-#define clear_csr(reg, bit) ({ unsigned long __tmp; \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h:211: asm volatile ("csrrc %0, " #reg ", %1" : "=r"(__tmp) : "rK"(bit)); \
openocd-0.10.0+g20200819/src/target/riscv/encoding.h-212- __tmp; })
##############################################
openocd-0.10.0+g20200819/src/target/dsp5680xx.h-227-#define MC568013_EONCE_OBASE_ADDR 0xFF
openocd-0.10.0+g20200819/src/target/dsp5680xx.h:228:/* The following are relative to EONCE_OBASE_ADDR (EONCE_OBASE_ADDR<<16 + ...) */
openocd-0.10.0+g20200819/src/target/dsp5680xx.h-229-#define MC568013_EONCE_TX_RX_ADDR 0xFFFE
##############################################
openocd-0.10.0+g20200819/src/target/arm926ejs.c-48-
openocd-0.10.0+g20200819/src/target/arm926ejs.c:49:#define ARM926EJS_CP15_ADDR(opcode_1, opcode_2, CRn, CRm) ((opcode_1 << 11) | (opcode_2 << 8) | (CRn << 4) | (CRm << 0))
openocd-0.10.0+g20200819/src/target/arm926ejs.c-50-
##############################################
openocd-0.10.0+g20200819/src/target/arm926ejs.c-56- struct arm_jtag *jtag_info = &arm7_9->jtag_info;
openocd-0.10.0+g20200819/src/target/arm926ejs.c:57: uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
openocd-0.10.0+g20200819/src/target/arm926ejs.c-58- struct scan_field fields[4];
##############################################
openocd-0.10.0+g20200819/src/target/arm926ejs.c-140- struct arm_jtag *jtag_info = &arm7_9->jtag_info;
openocd-0.10.0+g20200819/src/target/arm926ejs.c:141: uint32_t address = ARM926EJS_CP15_ADDR(op1, op2, CRn, CRm);
openocd-0.10.0+g20200819/src/target/arm926ejs.c-142- struct scan_field fields[4];
##############################################
openocd-0.10.0+g20200819/src/target/dsp563xx.c-588- /* TODO: use disassembly to set correct pc offset
openocd-0.10.0+g20200819/src/target/dsp563xx.c:589: * read 2 words from OPABF11 and disasm the instruction
openocd-0.10.0+g20200819/src/target/dsp563xx.c-590- */
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.h-35-
openocd-0.10.0+g20200819/src/target/mips32_pracc.h:36:#define PRACC_UPPER_BASE_ADDR (MIPS32_PRACC_BASE_ADDR >> 16)
openocd-0.10.0+g20200819/src/target/mips32_pracc.h-37-#define PRACC_MAX_CODE (MIPS32_PRACC_PARAM_OUT - MIPS32_PRACC_TEXT)
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.h-87- *
openocd-0.10.0+g20200819/src/target/mips32_pracc.h:88: * Simulates mfc0 ASM instruction (Move From C0),
openocd-0.10.0+g20200819/src/target/mips32_pracc.h-89- * i.e. implements copro C0 Register read.
##############################################
openocd-0.10.0+g20200819/src/target/mips32_pracc.h-103- *
openocd-0.10.0+g20200819/src/target/mips32_pracc.h:104: * Simulates mtc0 ASM instruction (Move To C0),
openocd-0.10.0+g20200819/src/target/mips32_pracc.h-105- * i.e. implements copro C0 Register read.
##############################################
openocd-0.10.0+g20200819/config_subdir.m4-23-m4_ifblank([$2], [rm -f $srcdir/$1/configure.gnu],
openocd-0.10.0+g20200819/config_subdir.m4:24:[echo -e '#!/bin/sh\nexec "`dirname "'\$'0"`/configure" $2 "'\$'@"' > "$srcdir/$1/configure.gnu"
openocd-0.10.0+g20200819/config_subdir.m4-25-])
##############################################
openocd-0.10.0+g20200819/tools/scripts/checkpatch.pl-2252- if ($prefix !~ /$Type\s+$/ &&
openocd-0.10.0+g20200819/tools/scripts/checkpatch.pl:2253: ($where != 0 || $prefix !~ /^.\s+$/) &&
openocd-0.10.0+g20200819/tools/scripts/checkpatch.pl-2254- $prefix !~ /\{\s+$/) {
##############################################
openocd-0.10.0+g20200819/contrib/libdcc/dcc_stdio.c-63- do {
openocd-0.10.0+g20200819/contrib/libdcc/dcc_stdio.c:64: asm volatile("mrc p14, 0, %0, c0, c0" : "=r" (dcc_status));
openocd-0.10.0+g20200819/contrib/libdcc/dcc_stdio.c-65- } while (dcc_status & 0x2);
openocd-0.10.0+g20200819/contrib/libdcc/dcc_stdio.c-66-
openocd-0.10.0+g20200819/contrib/libdcc/dcc_stdio.c:67: asm volatile("mcr p14, 0, %0, c1, c0" : : "r" (dcc_data));
openocd-0.10.0+g20200819/contrib/libdcc/dcc_stdio.c-68-}
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/sh_qspi/Makefile-36-clean:
openocd-0.10.0+g20200819/contrib/loaders/flash/sh_qspi/Makefile:37: rm -rf *.elf *.hex *.map *.o *.disasm *.sym
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-26- do {
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c:27: asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-28- } while ((dcc_reg&1) == 0);
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-29-
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c:30: asm volatile ("mrc p14, 0, %0, C1, C0" : "=r" (dcc_reg) :);
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-31- return dcc_reg;
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-40- do {
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c:41: asm volatile ("mrc p14, 0, %0, C0, C0" : "=r" (dcc_reg) :);
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-42- /* operation controlled by master, cancel operation
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-46-
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c:47: asm volatile ("mcr p14, 0, %0, C1, C0" : : "r" (data));
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/dcc.c-48- return 0;
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-17-
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile:18:# List all default ASM defines here, like -D_DEBUG=1
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-19-DADEFS =
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-46-
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile:47:# Define ASM defines here
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-48-UADEFS =
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-52-
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile:53:# List ASM source files here
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-54-ASRC = crt.s
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-81-ASFLAGS = $(MCFLAGS) -g -gdwarf-2 -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile:82:CPFLAGS = $(MCFLAGS) $(OPT) -gdwarf-2 -mthumb-interwork -fomit-frame-pointer -Wall -Wstrict-prototypes -fverbose-asm -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
openocd-0.10.0+g20200819/contrib/loaders/flash/at91sam7x/makefile-83-LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds-114- .data : {
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds:115: __data_load__ = LOADADDR (.data);
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p411x/msp432p411x.lds-116- __data_start__ = .;
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds-115- .data : {
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds:116: __data_load__ = LOADADDR (.data);
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p401x/msp432p401x.lds-117- __data_start__ = .;
##############################################
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds-113- .data : {
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds:114: __data_load__ = LOADADDR (.data);
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432e4x/msp432e4x.lds-115- __data_start__ = .;
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openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p411x.h-157-/* Address of BSL API table */
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p411x.h:158:#define BSL_API_TABLE_ADDR ((uint32_t)0x00202000)
openocd-0.10.0+g20200819/contrib/loaders/flash/msp432/msp432p411x.h-159-
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openocd-0.10.0+g20200819/contrib/loaders/erase_check/stm8_erase_check.s-59-;
openocd-0.10.0+g20200819/contrib/loaders/erase_check/stm8_erase_check.s:60:; increment start_addr (addr)
openocd-0.10.0+g20200819/contrib/loaders/erase_check/stm8_erase_check.s-61- incw X
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openocd-0.10.0+g20200819/contrib/cross-build.sh-37-## Source code paths, customize as necessary
openocd-0.10.0+g20200819/contrib/cross-build.sh:38:: ${OPENOCD_SRC:="`dirname "$0"`/.."}
openocd-0.10.0+g20200819/contrib/cross-build.sh-39-: ${LIBUSB1_SRC:=/path/to/libusb}
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openocd-0.10.0+g20200819/contrib/cross-build.sh-41-
openocd-0.10.0+g20200819/contrib/cross-build.sh:42:OPENOCD_SRC=`readlink -m $OPENOCD_SRC`
openocd-0.10.0+g20200819/contrib/cross-build.sh:43:LIBUSB1_SRC=`readlink -m $LIBUSB1_SRC`
openocd-0.10.0+g20200819/contrib/cross-build.sh:44:HIDAPI_SRC=`readlink -m $HIDAPI_SRC`
openocd-0.10.0+g20200819/contrib/cross-build.sh-45-
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openocd-0.10.0+g20200819/contrib/cross-build.sh-58-## OpenOCD-only install dir for packaging
openocd-0.10.0+g20200819/contrib/cross-build.sh:59:PACKAGE_DIR=$WORK_DIR/openocd_`git --git-dir=$OPENOCD_SRC/.git describe`_$HOST_TRIPLET
openocd-0.10.0+g20200819/contrib/cross-build.sh-60-
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openocd-0.10.0+g20200819/contrib/cross-build.sh-90-cd $LIBUSB1_BUILD_DIR
openocd-0.10.0+g20200819/contrib/cross-build.sh:91:$LIBUSB1_SRC/configure --build=`$LIBUSB1_SRC/config.guess` --host=$HOST_TRIPLET \
openocd-0.10.0+g20200819/contrib/cross-build.sh-92---with-sysroot=$SYSROOT --prefix=$PREFIX \
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openocd-0.10.0+g20200819/contrib/cross-build.sh-100- cd $HIDAPI_BUILD_DIR
openocd-0.10.0+g20200819/contrib/cross-build.sh:101: $HIDAPI_SRC/configure --build=`$HIDAPI_SRC/config.guess` --host=$HOST_TRIPLET \
openocd-0.10.0+g20200819/contrib/cross-build.sh-102- --with-sysroot=$SYSROOT --prefix=$PREFIX \
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openocd-0.10.0+g20200819/contrib/cross-build.sh-110-cd $OPENOCD_BUILD_DIR
openocd-0.10.0+g20200819/contrib/cross-build.sh:111:$OPENOCD_SRC/configure --build=`$OPENOCD_SRC/config.guess` --host=$HOST_TRIPLET \
openocd-0.10.0+g20200819/contrib/cross-build.sh-112---with-sysroot=$SYSROOT --prefix=$PREFIX \
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openocd-0.10.0+g20200819/configure.ac-630- [AC_MSG_WARN([libusb-1.x older than 1.0.9 detected, consider updating])])
openocd-0.10.0+g20200819/configure.ac:631: LIBUSB1_CFLAGS=`echo $LIBUSB1_CFLAGS | sed 's/-I/-isystem /'`
openocd-0.10.0+g20200819/configure.ac-632- AC_MSG_NOTICE([libusb-1.0 header bug workaround: LIBUSB1_CFLAGS changed to "$LIBUSB1_CFLAGS"])